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AS5055 low power 12-bit magnetic rotary encoder www.ams.com/AS5055 revision 1.16 1 - 26 1 general description the AS5055 is a single-chip magnetic rotary encoder ic with low voltage and low power features. it includes 4 integrated hall elements, a high resolution adc and a smart power management controller. the angle position, alarm bits and magnetic field information are transmitted over a standard 3-wire or 4-wire spi interface to the host processor. the AS5055 is available in a small qfn 16-pin 4x4x0.85 mm package and specified over an operating temperature of -40oc to +85oc. figure 1. AS5055 block diagram 2 key features ?? 12-bit resolution ?? standard spi interface, 3 or 4 wire ?? 3.0v to 3.6v core voltage, 1.8v to 3.6v peripheral supply voltage ?? automatic wake-up over spi interface ?? interrupt output for conversion complete indication ?? low power mode: - < 5ma (avg) @ 1ms readout interval - < 500a (avg) @ 10ms readout interval - < 53a (avg) @ 100ms readout interval ?? small size 16-pin qfn (4x4x0.85 mm) 3 applications the device is ideal for servo motor control, input device for battery operated portable devices, and robotics. vdd vss int/ mosi sck vddp hall sensors AS5055 miso ss/ wire mode en_int/ adc spi interface power management cordic
www.ams.com/AS5055 revision 1.16 2 - 26 AS5055 datasheet - contents contents 1 general description ......................................................................................................... ......................................................... 1 2 key features................................................................................................................ ............................................................. 1 3 applications................................................................................................................ ............................................................... 1 4 pin assignments ............................................................................................................. .......................................................... 3 4.1 pin descriptions.......................................................................................................... .......................................................................... 3 5 absolute maximum ratings .................................................................................................... .................................................. 4 6 electrical characteristics.................................................................................................. ......................................................... 5 6.1 operating conditions...................................................................................................... ...................................................................... 5 6.2 system parameters ......................................................................................................... ..................................................................... 5 6.3 dc/ac characteristics..................................................................................................... ..................................................................... 6 7 detailed description........................................................................................................ .......................................................... 7 7.1 operating modes ........................................................................................................... ....................................................................... 7 7.1.1 power supply filter..................................................................................................... ................................................................. 7 7.1.2 reading an angle ........................................................................................................ ................................................................ 8 7.1.3 low power mode .......................................................................................................... ............................................................... 8 7.1.4 interrupt chaining ...................................................................................................... .................................................................. 8 7.2 spi communication......................................................................................................... ..................................................................... 9 7.2.1 command package ......................................................................................................... ............................................................ 9 7.2.2 read package (value read from AS5055) ................................................................................... .............................................. 9 7.2.3 write data package (value written to AS5055) ............................................................................ ............................................ 10 7.2.4 register block.......................................................................................................... .................................................................. 10 7.2.5 spi interface commands.................................................................................................. ......................................................... 11 7.2.6 error monitoring ........................................................................................................ .................................................................. 14 8 application information ..................................................................................................... ...................................................... 16 8.1 spi interface............................................................................................................. .......................................................................... 16 8.1.1 spi interface signals (4-wire mode, wire_mode = 1)...................................................................... ......................................... 16 8.1.2 spi timing .............................................................................................................. ................................................................... 17 8.1.3 spi connection to the host c ........................................................................................... ...................................................... 18 8.1.4 spi over long distances ................................................................................................. ......................................................... 20 8.2 placement of the magnet................................................................................................... ................................................................. 21 9 package drawings and markings ............................................................................................... ............................................ 22 10 ordering information....................................................................................................... ...................................................... 25
www.ams.com/AS5055 revision 1.16 3 - 26 AS5055 datasheet - pin assignments 4 pin assignments figure 2. pin assignments (top view) 4.1 pin descriptions table 1. pin descriptions pin number pin name pin type description 1 mosi digital input spi bus data input 2 miso digital output, tri-state buffer spi bus data output 3 sck digital input schmitt trigger spi clock schmitt trigger 4 ss/ digital input spi slave select, active low 5 nc - leave unconnected 6 nc 7 nc 8 nc 9 test coil supply test pin, connect to vss 10 en_int/ digital input enable / disable interrupt 11 vddp supply peripheral power supply, 1.8v ~ vdd 12 vdd analog and digital power supply, 3.0 ~ 3.6v 13 vss supply ground 14 wire_mode digital i/o 0: 3-wire mode 1: 4-wire mode 15 int/ digital output, tri-state buffer interrupt output. active low, when conversion is finished 16 nc - leave unconnected epad - - center pad not connected mosi miso sck ss/ 16 13 14 15 5 8 7 6 1 4 3 2 12 9 10 11 vdd vddp en_int/ test_coil nc nc nc nc nc vss wire_mode int/ epad
www.ams.com/AS5055 revision 1.16 4 - 26 AS5055 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 5 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 2. absolute maximum ratings symbol parameter min max units comments electrical parameters v dd dc supply voltage -0.3 5.0 v value of these process dependent parameters to be taken from according process parameter document, current version vddp peripheral supply voltage -0.3 vdd+0.3 v v in input pin voltage -0.3 5.0 v i scr input current (latchup immunity) -100 100 ma norm: jedec 78 electrostatic discharge esd electrostatic discharge 1 - kv norm: mil 883 e method 3015 ja package thermal resistance - 33.5 c/w velocity=0, multi layer pcb; jedec standard testboard continuous power dissipation p t total power dissipation 36 mw temperature ranges and storage conditions t strg storage temperature -55 125 c t body package body temperature 260 c the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020 ?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn). humidity non-condensing 5 85 % msl moisture sensitive level 3 represents a maximum floor life time of 168h
www.ams.com/AS5055 revision 1.16 5 - 26 AS5055 datasheet - electrical characteristics 6 electrical characteristics 6.1 operating conditions 6.2 system parameters table 3. operating conditions parameter conditions min typ max units dc supply voltage vdd 3.0 3.6 v peripheral supply voltage 1 1. vddp must not exceed vdd (protection diode between vddp and vdd) vddp 1.8 vdd v input pin voltage v in -0.3 vddp +0.3 v ambient operating temperature -40 85 c external component power supply filter, pin vdd (refer to power supply filter on page 7 ) 2.2 4.7 f 15 33 ceramic capacitor, pin vddp to vss 100 nf table 4. system parameters symbol parameter conditions min typ max units i_10 operating current average current @ 10 ms readout rate 1 1. without the time for the spi interface 0.4 ma i_100 operating current average current @ 100 ms readout rate 40 a i_max operating current maximum readout rate 8.5 ma readout rate time between read angle command and interrupt 320 430 s power down current power down current 3 a rd lateral displacement range centre of the magnet to the centre of the die - 0.5 mm b z magnetic field strength 30 - 80 mt serial interface spi mode 1 (cpol = 0 / cpha =1) resolution; magnetic field measurement 12 bit resolution; angle 12 bit inl best-fit line - over supply, displacement and temperature ? but without quantization -1.41 1.41 degree ic package qfn 4x4x0.85
www.ams.com/AS5055 revision 1.16 6 - 26 AS5055 datasheet - electrical characteristics 6.3 dc/ac characteristics digital pads: miso, mosi, sck, ss/, en_int/, int/, wire_mode table 5. dc/ac characteristics symbol parameter conditions min typ max units v ih high level input voltage 0.7 * vddp v v il low level input voltage vddp > 2.7v 0.3 * vddp v v il low level input voltage vddp < 2.7v 0.25 * vddp v i leak input leakage current 1 a v oh high level output voltage vddp - 0.5 v v ol low level output voltage vss + 0.4 v c l capacitive load 35 pf
www.ams.com/AS5055 revision 1.16 7 - 26 AS5055 datasheet - detailed description 7 detailed description user programming. the AS5055 does not require any programming by the user. a dedicated on-chip zero position programming is not implemented. if a zero position programming is required, it is recommended to store the zero position offset in the host controller. 7.1 operating modes typical application. the AS5055 requires only a few external components in order to operate immediately when connected to the host microcontroller. only 6 wires are needed for a simple application using a single power supply: two wires for power and four wires for the spi communication. a seventh connection can be added in order to send an interrupt to the host cpu to inform that a new valid angle can be read. for additio nal information on the layout and filtering of the spi, please refer to section 8.1.4 spi over long distances . figure 3. typical application using spi 4-wire mode and int/ output upon power-up, the AS5055 performs a full power-up sequence including one angle measurement. the completion of this cycle is in dicated at the int/ output pin and the angle value is stored in an internal register. once this output is low active, the AS5055 suspends to sleep mode. 7.1.1 power supply filter due to the sequential internal sampling of the hall sensors, fluctuations on the analog power supply (pin#12: vdd) may cause ad ditional jitter of the measured angle. this jitter can be avoided by providing a stable vdd supply. the easiest way to achieve that is to add a rc filter: 15 + 4.7f in the power supply line as shown in figure 3 . alternatively, a filter: 33 + 2.2f may be used. however with this configuration, the minimum supply voltage is 3.15v. c interrupt supply: peripherals 47 dc 3.0v ~ 3.6v spi interface vdd vddp vdd vss int/ mosi sck hall sensors AS5055 miso ss/ wire mode en_int/ adc spi interface cordic vddp vddp 100n test_coil 15 ohm power management dc 1.8v ~ 3.6v
www.ams.com/AS5055 revision 1.16 8 - 26 AS5055 datasheet - detailed description 7.1.2 reading an angle the external microcontroller can respond to the int request by reading the angle value from the AS5055 over the spi interface. once the angle value is read, the int output is cleared again. sending a ?read angle? command by the spi interface also automatically powers up the chip and starts another angle measurement. as soon as the microcontroller has completed reading of the angle value, the int output is cleared and a new result is stored in the angle register. the completion of the angle measurement is again indicated by setting the int output and a corresponding flag in the status registe r. reducing the angle jitter. due to the measurement principle of the chip, only a single angle measurement is performed in very short time after each power-up sequence. as soon as the measurement of one angle is completed, the chip suspends to power-down state. an o n-chip filtering of the angle value by digital averaging is not implemented, as this would require more than one angle measurement and consequently, a longer power- up time which is not desired in low-power applications. the angle jitter can be reduced by averaging of several angle samples in the external microcontroller. for example, an averagin g of 4 samples reduces the noise related jitter by 6db (50%). 7.1.3 low power mode after completing the readout of an angle value, the device is in very low power condition. the AS5055 remains in sleep mode unt il it receives another angle reading request over the spi interface. the average power consumption therefore depends on the interval, at which the external controller reads an angle over the spi interface. the timing ratio between active and sleep phase: (eq 1) where: t on = minimum on-time for power-up and angle measurement 430s t off = pause interval between measurements, determined by the polling rate of the external microcontroller i on = current consumption in active mode 8.5ma (maximum) i off = current consumption in sleep mode 3a examples: 3000 measurements per second (continuous mode) i = 8.5ma 1000 measurements per second iavg = 3.7ma 100 measurements per second iavg = 370a 10 measurements per second iavg = 40a note: even in low power mode, the power supply must be capable of supporting the active current at least for the time t on , until the AS5055 is suspended to sleep mode. 7.1.4 interrupt chaining every chip contains a configurable gate to combine its own internally generated interrupt signal with a signal applied external ly over the xenint- pin. the int-mode register is preset via an otp register and can be overwritten by the spi interface. case a. device a is set to mode 0 device b is set to mode 0 the micro controller recognizes an interrupt if both devices signalize that the computation is finished. case b. device a is set to mode 0 device b is set to mode 1 the micro controller recognizes an interrupt if one of the two devices signalize that the computation is finished. off on off off on on avg t t i t i t i + ? + ? =
www.ams.com/AS5055 revision 1.16 9 - 26 AS5055 datasheet - detailed description figure 4. interrupt chaining 7.2 spi communication the transmitted data consists of 14-bit data, an error-flag and a parity bit. when writing data to the chip, the error-flag is not applicable. the parity is generated from the upper 15 bits and forms an even parity over the whole frame. the error-flag indicates that a failu re occurred in a previous transmission. 7.2.1 command package every command sent to the AS5055 is represented with the following layout. 7.2.2 read package (value read from AS5055) the read frame always contains two alarm bits, the error and parity flags and the addressed data of the previous read command. table 6. command package bit msb 14 13 12 11 10 9 8 7 6 5 4 3 2 1 lsb rwn address <13:0> par bit description rwn indicates read or write command address 14-bit address code par parity bit (even) table 7. read package bit msb 14 13 12 11 10 9 8 7 6 5 4 3 2 1 lsb data <13:0> ef par bit description data 14-bit addressed data ef error flag indicating a transmission error in a previous host transmission par parity bit (even) xint xenint =1 mux 0 otp x_interrupt 1 xint xenint mux 0 x_interrupt 1 AS5055 (device a) AS5055 (device b) micro controller xint int mode otp int mode & =1 &
www.ams.com/AS5055 revision 1.16 10 - 26 AS5055 datasheet - detailed description 7.2.3 write data package (value written to AS5055) the write frame is compatible to the read frame and contains two additional bits, the don?t care and parity flag. if the previous command was a write command a second package has to be transmitted. 7.2.4 register block table 8. write package bit msb 14 13 12 11 10 9 8 7 6 5 4 3 2 1 lsb data <13:0> don?t care par bit description data 14-bit data to write to former selected address par parity bit (even) table 9. register block register bit mode reset value bit description power on reset (por) re gister - [0x3f22] por_off 8 r/w 0x00 <7:0> the por cell is deactivated when the value 0x5a is written to this register (30a reduction of current consumption) software reset register - [0x3c00] software_reset 14 w 0x000 <13:0> refer to software reset co mmand on page 13 master reset register - [0x33a5] master_reset 14 w 0x000 <13:0> inject a power on reset cycle clear error flag register - [0x3380] clr_error_flag 14 r 0x000 <13:0> refer to clear error flag command on page 12 no operation register - [0x0000] nop 14 w 0x000 <13:0> refer to nop command on page 14 automatic gain control (agc) register - [0x03ff8] agc 6 r/w 0x20 <5:0> automatic gain control: low values = strong magnetic field high values = weak magnetic field angular data - [0x3fff] angle value 12 r 0x000 <11:0> measured angular value, 12-bit alarm lo 1 r 0 <12> alarm bit indicating a too high magnetic field, active high. refer to error monitoring on page 14 alarm hi 1 r 0 <13> alarm bit indicating a too low magnetic field, active high. refer to error monitoring on page 14 system configuration register 1 - [0x3f20] resolution 2 r ?00? <13:12> ?00? indicates 12-bit resolution chip id 3 r ?001? <11:9> silicon version 001 error status register - [0x335a] error_status 14 r 0x000 <13:0> refer to error status command on page 15
www.ams.com/AS5055 revision 1.16 11 - 26 AS5055 datasheet - detailed description 7.2.5 spi interface commands read command. for a single read command two transmission sequences are nece ssary. the first package written to the AS5055 contains the read command ( msb high ) and the address the chip has to access, the second package transmitted to the AS5055 device can be any command the chip has to process next. the content of the desired register is available in the miso register of the master devic e at the end of the second transmission cycle. figure 5. read command write command. a single write command takes two transmission cycles. the write command can be verified by sending a nop command after the write command. the data will be send back during nop command. figure 6. write command read next command mosi msb lsb msb lsb response - 1 response on read command miso msb lsb msb lsb t com transmission n transmission n + 1 write command data mosi msb lsb msb lsb response -1 old register content miso msb lsb msb lsb t com transmission n transmission n + 1 next command msb lsb new register content msb lsb transmission n + 2
www.ams.com/AS5055 revision 1.16 12 - 26 AS5055 datasheet - detailed description clear error flag command. the clear error flag command is implemented as read command. this command clears the error flag which is contained in every read frame. the read data are 0x0000, which indicates a successful clear command. figure 7. clear error flag command the package necessary to perform a clear error flag is built up as follows. possible conditions which for ce the error flag to be set: ?? wrong parity ?? wrong command ?? wrong number of clocks (no full transmission cycle or too many clocks) note: if the error flag is set to ?high? because of a communication problem the flag remains set until it will be cleared by an exter nal command. table 10. clear error flag command bit msb 14 13 12 11 10 9 8 7 6 5 4 3 2 1 lsb 111001110000000par clear error flag command par clear error flag next command mosi msb lsb msb lsb response-1 0x 0000 miso msb lsb msb lsb t com transmission n transmission n +1
www.ams.com/AS5055 revision 1.16 13 - 26 AS5055 datasheet - detailed description software reset command. the software reset command is implemented as wr ite command. the bit ?res spi? of the data package indicates if the spi registers should be reset as well. the soft reset resets the digital part (?res spi? is set to one ) as well as the otp memory. a new otp memory auto-load is initiated and the reset values stored in the otp memory are loaded into the configuration registers. the command followi ng the software reset command can be any of the commands specified in this chapter. after the data package is sent, the soft reset is generated. the fuses of the otp memory are loaded into the registers and a ne w conversion cycle will be started. if the device is in sleep mode the oscillator will be started first. figure 8. software reset command in order to invoke a software reset on the AS5055 the following bit pattern has to be sent. table 11. software reset command bit msb 14 13 12 11 10 9 8 7 6 5 4 3 2 1 lsb 011110000000000par software reset command par table 12. data package bit msb 14 13 12 11 10 9 8 7 6 5 4 3 2 1 lsb don?t care res spi don?t care par bit description res spi if set to one, spi registers are reset as well 1 1. after a power on reset, the otp will be read and hence otp related registers are changed independent on the res spi flag. par parity bit (even) software reset command data mosi msb lsb msb lsb response -1 0x 0000 miso msb lsb msb lsb t com transmission n transmission n +1 next command msb lsb 0x 0000 msb lsb transmission n +2
www.ams.com/AS5055 revision 1.16 14 - 26 AS5055 datasheet - detailed description nop command. the nop command represents a dummy write to the AS5055. figure 9. nop command the nop command frame looks like follows. the chip?s response on this command is 0x0000 ? if no error happens. 7.2.6 error monitoring the correct operation and communication of the AS5055 is ensured by several particular error flags. every read access is suppor ted by an error flag (ef) to indicate a transmission error. in addition a dedicated error status register is accessible. see table 14 on page 15 . table 13. nop command bit msb 14 13 12 11 10 9 8 7 6 5 4 3 2 1 lsb 000000000000000 nop command (0x0000) alarm hi alarm lo mode description 00 agc level is higher than the minimum value and lower than the maximum value 01 agc level is equal or even lower than the minimum level 10 agc level is equal or even higher than the maximum level 11 indicates if any error flag has occurred. for detailed information, refer to error status command on page 15 . nop nop mosi msb lsb msb lsb response -1 0x0000 miso msb lsb msb lsb t com transmission n transmission n +1 next command msb lsb 0x0000 msb lsb transmission n +2
www.ams.com/AS5055 revision 1.16 15 - 26 AS5055 datasheet - detailed description error status command. parity : indicates when the transmitted parity bit does not match to calculated parity bit clkmon : clock monitoring indicates when the amount of clock cycles is not correct addmon : address monitoring appears when the address does not exist wow : this is a handshake mechanism to check system integrity. by sending a read angle command the internal flag (wow) is set to hi gh. at the end of measurement the wow is set to low again. in failure case (internal dead lock situation) the wow flag remains high . mode : during sleep mode, the flag is 0. when the ic is busy (measuring), the flag is 1. dacov : the dacov bit occurs if the magnetic input field strengths is too large for at least one hall element. this can be the case i f the magnet is displaced. dspov : cordic overflow occurs when the input signals of cordic are too large ranerr : range error appears when the voltage drop over the internal current source decreases which is caused by increased temperature . the accuracy is getting worse. dspalo : dsp alarm lo; agc level is equal or even lower than the minimum level. dspahi : dsp alarm hi; agc level is equal or even higher than the maximum level. for additional information on error status, please refer to the application note an5000_error monitoring . table 14. error status command description error status dsp error status system error status spi bit 13 12 11 10 9 8 7 6 5 4 3 2 1 0 type reserved dspahi dspalo ranerr dspov dacov reserved mode wow reserved addmon clkmon parity
www.ams.com/AS5055 revision 1.16 16 - 26 AS5055 datasheet - application information 8 application information the benefits of the AS5055 device are as follows: ?? complete system-on-chip ?? low power consumption ?? low operating voltage ?? easy to use spi interface 8.1 spi interface the 16-bit spi interface enables read / write access to the register blocks and is compatible to a standard micro controller in terface. the spi module is active as soon as /ss pin is pulled low. the AS5055 then reads the digital value on the mosi (master out slave in) in put with every falling edge of sck and writes on its miso (master in slave out) output with the rising edge. after 16 clock cycles /ss has to be set back to a high status in order to reset some parts of the interface core. the spi interface can be set in two different modes: 3-wire mode or 4-wire mode. notes: 1. the wire mode selection is read during the power-up stat e and can be changed with a power on reset or a software reset comm and. 2. for more stability on the spi interface, it is very important to place filters. the filter must be placed close to the driv ing outputs. for further information, please refer to the application note an5000_spi_interface . 8.1.1 spi interface signals (4-wire mode, wire_mode = 1) the AS5055 only supports slave operation mode. therefore sck for the communication as well as the /ss signal has to be provided by the test equipment. the following picture shows a basic interconnection di agram with one master and an AS5055 device and a principle sch ematic of the interface core. figure 10. spi interface connection because the interface has to decode the sent command before it can react and provide data the response of the chip to a specifi c command applied at a time t can be accessed in the next transmission cycle ending at t + tcom. table 15. wire mode selection wire mode selection (pad 14) wire_mode = lo 3-wire mode wire_mode = hi 4-wire mode spi_clk spi_ss n mosi miso sck ss/ rxsr interface core miso mosi master device (tester) AS5055 txsr rxspi txspi
www.ams.com/AS5055 revision 1.16 17 - 26 AS5055 datasheet - application information the data are sent and read with msb first . every time the chip is accessed it is sending and receiving data. figure 11. spi command / response data flow 8.1.2 spi timing figure 12. spi timing diagram table 16. spi timing characteristics parameter description min max unit t oz time between positive edge of ss/ to output high impedance 50 ns t l time between ss/ falling edge and sck rising edge 10 ns t sck serial clock period 100 ns t sckl low period of serial clock 50 ns t sckh high period of serial clock 50 ns t h time between last falling edge of sck and rising edge of ss/ t sck / 2 ns command 1 command 2 command n - 1 command n mosi msblsbmsblsbmsblsbmsblsb 0x00 response 1 response 2 response n - 1 miso msblsbmsblsbmsblsbmsblsb t com transmission 1 transmission 2 transmission n - 1 transmission n ss / ( input ) sck ( input ) mosi ( input ) miso ( output ) t sck t l t mosi t miso t oz t oz t h t xssh t sckl t sckh data[ 15] data[ 15] data[ 14] data[ 14] data [0] data [0]
www.ams.com/AS5055 revision 1.16 18 - 26 AS5055 datasheet - application information 8.1.3 spi connection to the host c single slave mode. figure 13. single slave mode note: 3 wire mode (read only): if the error flag is set the device must be externally reset. t xssh high time of ss/ between two transmissions 50 ns t mosi data input valid to clock edge 20 ns t miso sck edge to data output valid 20 ns table 16. spi timing characteristics parameter description min max unit uc AS5055 mosi miso sck ss/ miso mosi sck ss/ wire_mode 1 uc AS5055 siso sck ss/ mosi miso sck ss/ wire_mode 0 write cmd read angle 3 write cmd read angle 2 angle 1 angle 2 write cmd read angle 1 write cmd read angle 4 angle 3 write cmd read angle 5 write cmd read angle 6 angle 5 angle 4 write cmd nop ... angle 6 write cmd read angle 2 write cmd read angle 1 angle 1 angle 2 write cmd read angle 3 angle 4 angle 3 mosi miso 0xffff 0xffff 0xffff 0xffff 0xffff siso write cmd read angle 4 uc AS5055 miso sck ss/ miso mosi sck ss/ wire_mode 1 1 ... angle 1 angle 2 angle 4 angle 3 angle 6 angle 5 miso angle 7 4 wire mode 3 wire mode (read only ) 3 wire mode (bi - dir) 0xffff 0xffff 0xffff 0xffff 0xffff ss/ ss/ ss/
www.ams.com/AS5055 revision 1.16 19 - 26 AS5055 datasheet - application information multiple slave, n+3 wire (separate chipselect). figure 14. multiple slave, n+3 wire (separate chipselect) daisy chain, 4 wire. figure 15. daisy chain, 4-wire uc AS5055 i mosi miso sck ss1/ mosi miso sck ss/ wire_ mode 1 AS5055 iii mosi miso sck ss / wire_ mode 1 write cmd sw reset write cmd read angle 2 xx ... angle 1 write cmd read angle 1 xx angle 2 write cmd read angle 3 xx angle 3 write cmd nop uc mosi uc miso 0xffff 0xffff AS5055 ii mosi miso sck ss/ wire_ mode 1 0xffff 0xffff ss2/ ss3/ ss 1/ ss 2/ ss 2/ uc AS5055 i mosi miso sck ss/ mosi miso sck ss/ wire_mode 1 AS5055 iii mosi miso sck ss/ wire_mode 1 write cmd sw reset write cmd sw reset ... write cmd sw reset uc mosi uc miso 0 xffff 0xffff AS5055 ii mosi miso sck ss/ wire_mode 1 0xffff ss/ read angle 3 read angle 3 read angle 1 angle 3 read angle 2 read angle 2 angle 2 read angle 1 ... angle 3 angle 1 ... ... angle 1 angle 2 uc mosi uc miso ss/ 0xffff 0xffff 0xffff
www.ams.com/AS5055 revision 1.16 20 - 26 AS5055 datasheet - application information 8.1.4 spi over long distances over long cable distances you will have coupling capacitance between signals. therefore consider some aspects. the circuitry of the connection is shown in figure 16 . figure 16. circuitry of spi over long distances one aspect is that between miso and sck must be separated with vss. additionally filter circuitry, reduces the disturbance to a minimum. resistors close to the output pins reduce communication noise and increase emc. required resistors on the output pins are between 100 ohm and 1000 ohm. required capacitance is 100pf. place the resistors and capacitors as near as possible to the pins. for additional information on this issue, please refer to the application note AS5055_spi_appnote. spi interface AS5055 spi interface c mosi miso vss sck ss/ mosi miso vss sck ss/ r r r c c c c c c c c r
www.ams.com/AS5055 revision 1.16 21 - 26 AS5055 datasheet - application information 8.2 placement of the magnet non-linearity error over displacement. as shown in figure 18 , the recommended horizontal position of the magnet axis is over the diagonal center of the ic. figure 17 shows a typical error curve at a vertical magnet distance of 1.0mm, measured with a ndfeb n35h magnet with 6mm diameter and 2.5mm height. the x- and y- axis of the graph indicate the lateral displacement of the magnet center with respect to the ic center. at x = y = 0, the magnet is perfectly centered over the ic. the total displacement plotted on the graph is for 1mm in both dir ections. the z-axis displays the worst case inl error over a full turn at each given x-and y- displacement. the error includes the quant ization error of ? lsb. at the sample shown in figure 17 , the accuracy for a centered magnet is better than 0.5. within a radius of 0.5mm, the accuracy is about 1.0 (spec = 1.41 over temperature). figure 17. integral non-linearity over displacement of the magnet -1,0 -0,7 -0,4 -0,1 0,2 0,5 0,8 -1,0 -0,7 -0,4 -0,1 0,2 0,5 0,8 0 0,5 1 1,5 2 2,5 3 3,5 4 inl [] x-displacement [mm] y-displacement [mm] non-linearity @ z=1mm 3,5-4 3-3,5 2,5-3 2-2,5 1,5-2 1-1,5 0,5-1 0-0,5
www.ams.com/AS5055 revision 1.16 22 - 26 AS5055 datasheet - package drawings and markings 9 package drawings and markings the device is available in a 16-pin qfn (4x4x0.85 mm) package. figure 18. drawings and dimensions marking: yywwxzz. yy ww x zz @ year (i.e. 04 for 2004) week assembly plant identifier assembly traceability code sublot identifier symbol min nom max a 0.80 0.90 1.00 a1 0 0.02 0.05 a3 0.20 ref l 0.45 0.50 0.55 l1 0 - 0.15 b 0.25 0.30 0.35 d 4.00 bsc e 4.00 bsc e 0.65 bsc d2 2.30 2.40 2.50 e2 2.30 2.40 2.50 aaa - 0.15 - bbb - 0.10 - ccc - 0.10 - ddd - 0.05 - eee - 0.08 - fff - 0.10 - n16 notes: 1. dimensions and tolerancing conform to asme y14.5m-1994 . 2. all dimensions are in millimeters. angles are in degrees. 3. dimension b applies to metallized terminal and is measured between 0.25mm and 0.30mm from terminal tip. dimension l1 represents terminal full back from package edge up to 0.15mm is acceptable. 4. coplanarity applies to the exposed heat slug as well as the terminal. 5. radius on terminal is optional. 6. n is the total number of terminals. AS5055 @ yywwxzz
www.ams.com/AS5055 revision 1.16 23 - 26 AS5055 datasheet - package drawings and markings figure 19. vertical cross section of 16-pin qfn (4x4x0.85 mm) notes: 1. all dimensions in mm. 2. die thickness 0.254 0.013 3. adhesive thickness 0.010 10, +0.01, -0.0025 4. lead frame thickness 0.203 typ.
www.ams.com/AS5055 revision 1.16 24 - 26 AS5055 datasheet - revision history revision history note: typos may not be explicitly mentioned under revision history. revision date owner description 1.0 23 mar, 2010 jja initial revision of public release version 1.1 8 jun, 2010 jlu updated pin descriptions (pin 16), typical application , spi connection to the host c , figure 3 , figure 13 , figure 14 , figure 15 . 1.11 3 nov, 2010 agt updated absolute maximum ratings , system parameters , pin descriptions , power supply filter , table 9 , spi connection to the host c , package drawings and markings . 1.12 3 nov, 2011 mub updated operating temperature range. 1.13 28 dec, 2011 rei updated figure 3 , table 9 and package drawings. 1.14 11 jul, 2012 updated alarm lo / hi info in table 9 . 1.15 16 oct, 2012 ekno updated figure 1 , section 4, section 7.2.4, table 16 ; added error status command , figure 19 , section 8.1.4 1.16 05 feb, 2013 correction of error status register and alarm bits, updated marking. 21 feb, 2013 updated table 4 , table 14 , table 16
www.ams.com/AS5055 revision 1.16 25 - 26 AS5055 datasheet - ordering information 10 ordering information the devices are available as the standard products shown in table 17 . note: all products are rohs compliant and ams green. buy our products or get free samples online at www.ams.com/icdirect technical support is available at www.ams.com/technical-support for further information and requests, email us at sales@ams.com (or) find your local distributor at www.ams.com/distributor table 17. ordering information ordering code description delivery form package AS5055 eqft 12-bit low power magnetic rotary encoder tape & reel 16-pin qfn (4x4x0.85 mm)
www.ams.com/AS5055 revision 1.16 26 - 26 AS5055 datasheet - copyrights copyrights copyright ? 1997-2013, ams ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registered ?. all right s reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written con sent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by ams ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. ams ag makes no warranty, express, statutory, implied, or by description rega rding the information set forth herein or regarding the freedom of the described devices from patent infringement. ams ag reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with ams ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliabi lity applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without addi tional processing by ams ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the stan dard production flow, such as test flow or test location. the information furnished here by ams ag is believed to be correct and accurate. however, ams ag shall not be liable to recipien t or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruptio n of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, perfo rmance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of ams ag rendering of technical or other services. contact information headquarters ams ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel : +43 (0) 3136 500 0 fax : +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.ams.com/contact

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